130 lines
4.1 KiB
Python
130 lines
4.1 KiB
Python
# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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#
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# SPDX-License-Identifier: GPL-2.0-or-later
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import struct
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import time
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from typing import Dict
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from .esp32c6 import ESP32C6ROM
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from ..loader import ESPLoader
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class ESP32C5BETA3ROM(ESP32C6ROM):
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CHIP_NAME = "ESP32-C5(beta3)"
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IMAGE_CHIP_ID = 17
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IROM_MAP_START = 0x41000000
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IROM_MAP_END = 0x41800000
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DROM_MAP_START = 0x41000000
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DROM_MAP_END = 0x41800000
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# Magic value for ESP32C5(beta3)
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CHIP_DETECT_MAGIC_VALUE = [0xE10D8082]
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FLASH_FREQUENCY = {
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"80m": 0xF,
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"40m": 0x0,
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"20m": 0x2,
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}
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MEMORY_MAP = [
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[0x00000000, 0x00010000, "PADDING"],
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[0x41800000, 0x42000000, "DROM"],
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[0x40800000, 0x40880000, "DRAM"],
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[0x40800000, 0x40880000, "BYTE_ACCESSIBLE"],
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[0x4004A000, 0x40050000, "DROM_MASK"],
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[0x40000000, 0x4004A000, "IROM_MASK"],
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[0x41000000, 0x41800000, "IROM"],
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[0x40800000, 0x40880000, "IRAM"],
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[0x50000000, 0x50004000, "RTC_IRAM"],
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[0x50000000, 0x50004000, "RTC_DRAM"],
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[0x600FE000, 0x60100000, "MEM_INTERNAL2"],
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]
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EFUSE_MAX_KEY = 5
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KEY_PURPOSES: Dict[int, str] = {
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0: "USER/EMPTY",
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1: "ECDSA_KEY",
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2: "XTS_AES_256_KEY_1",
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3: "XTS_AES_256_KEY_2",
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4: "XTS_AES_128_KEY",
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5: "HMAC_DOWN_ALL",
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6: "HMAC_DOWN_JTAG",
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7: "HMAC_DOWN_DIGITAL_SIGNATURE",
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8: "HMAC_UP",
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9: "SECURE_BOOT_DIGEST0",
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10: "SECURE_BOOT_DIGEST1",
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11: "SECURE_BOOT_DIGEST2",
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12: "KM_INIT_KEY",
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}
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def get_pkg_version(self):
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num_word = 2
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return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 26) & 0x07
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def get_minor_chip_version(self):
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num_word = 2
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return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F
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def get_major_chip_version(self):
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num_word = 2
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return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 4) & 0x03
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def get_chip_description(self):
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chip_name = {
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0: "ESP32-C5 beta3 (QFN40)",
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}.get(self.get_pkg_version(), "unknown ESP32-C5 beta3")
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major_rev = self.get_major_chip_version()
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minor_rev = self.get_minor_chip_version()
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return f"{chip_name} (revision v{major_rev}.{minor_rev})"
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def get_crystal_freq(self):
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# The crystal detection algorithm of ESP32/ESP8266
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# works for ESP32-C5 beta3 as well.
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return ESPLoader.get_crystal_freq(self)
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def change_baud(self, baud):
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rom_with_48M_XTAL = not self.IS_STUB and self.get_crystal_freq() == 48
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if rom_with_48M_XTAL:
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# The code is copied over from ESPLoader.change_baud().
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# Probably this is just a temporary solution until the next chip revision.
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# The ROM code thinks it uses a 40 MHz XTAL. Recompute the baud rate
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# in order to trick the ROM code to set the correct baud rate for
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# a 48 MHz XTAL.
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false_rom_baud = baud * 40 // 48
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print(f"Changing baud rate to {baud}")
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self.command(
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self.ESP_CHANGE_BAUDRATE, struct.pack("<II", false_rom_baud, 0)
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)
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print("Changed.")
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self._set_port_baudrate(baud)
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time.sleep(0.05) # get rid of garbage sent during baud rate change
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self.flush_input()
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else:
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ESPLoader.change_baud(self, baud)
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class ESP32C5BETA3StubLoader(ESP32C5BETA3ROM):
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"""Access class for ESP32C5BETA3 stub loader, runs on top of ROM.
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(Basically the same as ESP32StubLoader, but different base class.
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Can possibly be made into a mixin.)
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"""
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FLASH_WRITE_SIZE = 0x4000 # matches MAX_WRITE_BLOCK in stub_loader.c
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STATUS_BYTES_LENGTH = 2 # same as ESP8266, different to ESP32 ROM
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IS_STUB = True
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def __init__(self, rom_loader):
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self.secure_download_mode = rom_loader.secure_download_mode
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self._port = rom_loader._port
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self._trace_enabled = rom_loader._trace_enabled
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self.cache = rom_loader.cache
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self.flush_input() # resets _slip_reader
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ESP32C5BETA3ROM.STUB_CLASS = ESP32C5BETA3StubLoader
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