初始化提交
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279
boards/default_src/micropython/origin/build/lib/rc522.py
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279
boards/default_src/micropython/origin/build/lib/rc522.py
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"""
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RC522
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Micropython library for the RC522 RFID (I2C&SPI)
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=======================================================
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#Preliminary composition 20231204
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dahanzimin From the Mixly Team
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"""
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import machine
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from micropython import const
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RC_OK = True
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RC_NOTAGERR = None
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RC_ERR = False
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RC_REQIDL = const(0x26)
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RC_REQALL = const(0x52)
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RC_AUTHENT1A = const(0x60)
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RC_AUTHENT1B = const(0x61)
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RC_Version = const(0x37)
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class RC522:
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def __init__(self, drive_bus,cs_pin=None,addr=0x28):
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self._device= drive_bus
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if type(drive_bus) in [machine.I2C,machine.SoftI2C]:
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self._type=True
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self._address = addr
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elif type(drive_bus) in [machine.SPI,machine.SoftSPI]:
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self._type=False
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self._cs = machine.Pin(cs_pin, machine.Pin.OUT)
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else:
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raise ValueError("RC522 only supports I2C and SPI")
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self.init()
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self.add_list=[1,2,4,5,6,8,9,10,12,13,14,16,17,18,20,21,22,24,25,26,28,29,30,32,33,34,36,37,38,40,41,42,44,45,46,48,49,50,52,53,54,56,57,58,60,61,62]
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def _wreg(self, reg, val):
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'''Write memory address'''
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if self._type:
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self._device.writeto_mem(self._address,reg,val.to_bytes(1, 'little'))
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else:
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self._cs.value(0)
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self._device.write(b'%c' % int(0xff & ((reg << 1) & 0x7e)))
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self._device.write(b'%c' % int(0xff & val))
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self._cs.value(1)
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def _rreg(self, reg):
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'''Read memory address'''
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if self._type:
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return self._device.readfrom_mem(self._address, reg, 1)[0]
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else:
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self._cs.value(0)
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self._device.write(b'%c' % int(0xff & (((reg << 1) & 0x7e) | 0x80)))
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val = self._device.read(1)
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self._cs.value(1)
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return val[0]
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def _sflags(self, reg, mask):
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self._wreg(reg, self._rreg(reg) | mask)
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def _cflags(self, reg, mask):
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self._wreg(reg, self._rreg(reg) & (~mask))
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def _tocard(self, cmd, send):
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recv = []
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bits = 0
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irq_en = 0
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wait_irq =0
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n = 0
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stat = RC_ERR
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if cmd == 0x0E:
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irq_en = 0x12
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wait_irq = 0x10
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elif cmd == 0x0C:
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irq_en = 0x77
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wait_irq = 0x30
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self._wreg(0x02, irq_en)
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self._cflags(0x04, 0x80)
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self._sflags(0x0A, 0x80)
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self._wreg(0x01, 0x00)
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for c in send:
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self._wreg(0x09, c)
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self._wreg(0x01, cmd)
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if cmd == 0x0C:
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self._sflags(0x0D, 0x80)
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i = 100
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while True:
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n = self._rreg(0x04)
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i -= 1
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if ~((i != 0) and ~(n & 0x01) and ~(n & wait_irq)):
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break
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self._cflags(0x0D, 0x80)
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if i:
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if (self._rreg(0x06) & 0x1B) == 0x00:
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stat = RC_OK
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if n & irq_en & 0x01:
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stat = RC_NOTAGERR
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elif cmd == 0x0C:
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n = self._rreg(0x0A)
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lbits = self._rreg(0x0C) & 0x07
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if lbits != 0:
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bits = (n - 1) * 8 + lbits
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else:
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bits = n * 8
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if n == 0:
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n = 1
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elif n > 16:
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n = 16
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for _ in range(n):
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recv.append(self._rreg(0x09))
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else:
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stat = RC_ERR
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return stat, recv, bits
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def _crc(self, data):
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self._cflags(0x05, 0x04)
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self._sflags(0x0A, 0x80)
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for c in data:
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self._wreg(0x09, c)
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self._wreg(0x01, 0x03)
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i = 0xFF
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while True:
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n = self._rreg(0x05)
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i -= 1
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if not ((i != 0) and not (n & 0x04)):
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break
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return [self._rreg(0x22), self._rreg(0x21)]
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def init(self):
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self.reset()
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self._wreg(0x2A, 0x8D)
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self._wreg(0x2B, 0x3E)
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self._wreg(0x2D, 30)
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self._wreg(0x2C, 0)
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self._wreg(0x15, 0x40)
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self._wreg(0x11, 0x3D)
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self._wreg(0x26, 0x68)
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#A32NQ32C3 Additional Register Configuration
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if self._rreg(RC_Version) == 0x82:
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self._wreg(0x12, 0x0)
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self._wreg(0x13, 0x0)
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self._wreg(0x14, 0x84)
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self._wreg(0x18, 0x33)
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self._wreg(0x0c, 0x10)
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self.antenna_on()
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def reset(self):
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self._wreg(0x01, 0x0F)
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def antenna_on(self, on=True):
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if on and ~(self._rreg(0x14) & 0x03):
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self._sflags(0x14, 0x03)
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else:
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self._cflags(0x14, 0x03)
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def request(self, mode):
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self._wreg(0x0D, 0x07)
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stat, recv, bits = self._tocard(0x0C, [mode])
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if (stat != RC_OK) | (bits != 0x10):
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stat = RC_ERR
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return stat, bits
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def anticoll(self):
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ser_chk = 0
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ser = [0x93, 0x20]
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self._wreg(0x0D, 0x00)
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(stat, recv, bits) = self._tocard(0x0C, ser)
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if stat == RC_OK:
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if len(recv) == 5:
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for i in range(4):
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ser_chk = ser_chk ^ recv[i]
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if ser_chk != recv[4]:
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stat = RC_ERR
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else:
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stat = RC_ERR
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return stat, recv
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def select_tag(self, ser):
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buf = [0x93, 0x70] + ser[:5]
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buf += self._crc(buf)
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(stat, recv, bits) = self._tocard(0x0C, buf)
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return RC_OK if (stat == RC_OK) and (bits == 0x18) else RC_ERR
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def auth(self, mode, addr, sect, ser):
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return self._tocard(0x0E, [mode, addr] + sect + ser[:4])[0]
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def stop_crypto1(self):
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self._cflags(0x08, 0x08)
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def read(self, addr):
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data = [0x30, addr]
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data += self._crc(data)
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(stat, recv, _) = self._tocard(0x0C, data)
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return recv if stat == RC_OK else None
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def write(self, addr, data):
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buf = [0xA0, addr]
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buf += self._crc(buf)
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(stat, recv, bits) = self._tocard(0x0C, buf)
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if not (stat == RC_OK) or not (bits == 4) or not ((recv[0] & 0x0F) == 0x0A):
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stat = RC_ERR
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else:
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buf = [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
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for i in range(len(data)):
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buf[i]=data[i]
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buf += self._crc(buf)
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(stat, recv, bits) = self._tocard(0x0C, buf)
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if not (stat == RC_OK) or not (bits == 4) or not ((recv[0] & 0x0F) == 0x0A):
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stat = RC_ERR
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return stat
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def read_card(self,add,x='ALL'):#0:all,i:id,2:content
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if add>=47:
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raise AttributeError("Out of address range")
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stat, tag_type = self.request(RC_REQALL)
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if stat !=RC_OK:
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stat, tag_type = self.request(RC_REQALL)
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if stat == RC_OK:
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(stat, raw_uid) = self.anticoll()
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if stat == RC_OK:
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if self.select_tag(raw_uid) == RC_OK:
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key = [0xFF,0xFF,0xFF,0xFF,0xFF,0xFF]
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if self.auth(RC_AUTHENT1A, self.add_list[add], key, raw_uid) == RC_OK:
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card = self.read(self.add_list[add])
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try:
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card = bytes(card).decode().replace("\x00", '') if card else None
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except:
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card = bytes(card) if card else None
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self.stop_crypto1()
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if x == "ALL":
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return int('{}{}{}{}'.format(raw_uid[0], raw_uid[1], raw_uid[2], raw_uid[3])), card
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elif x == "id":
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return int('{}{}{}{}'.format(raw_uid[0], raw_uid[1], raw_uid[2], raw_uid[3]))
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elif x == "content":
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return card
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def write_card(self, data,add):
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if add>=47:
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raise AttributeError("Out of address range")
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stat, tag_type = self.request(RC_REQALL)
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if stat !=RC_OK:
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stat, tag_type = self.request(RC_REQALL)
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if stat == RC_OK:
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(stat, raw_uid) = self.anticoll()
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if stat == RC_OK:
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if self.select_tag(raw_uid) == RC_OK:
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key = [0xFF,0xFF,0xFF,0xFF,0xFF,0xFF]
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if self.auth(RC_AUTHENT1A, self.add_list[add], key, raw_uid) == RC_OK:
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try:
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data =list(data.encode())
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except:
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data =list(data)
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if len(data)>16:
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raise AttributeError("Input must be less than 16 bytes")
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stat = self.write(self.add_list[add], data)
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self.stop_crypto1()
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if stat == RC_OK:
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print('Data written to card')
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return RC_OK
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else:
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print('Failed to write data to card')
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return RC_ERR
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else:
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print('Authentication error')
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return RC_ERR
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else:
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print('Failed to select tag')
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return RC_ERR
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else:
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return RC_ERR
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def scan_card(self,stat=RC_REQIDL):
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return self.request(stat)[0]
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