145 lines
4.4 KiB
Python
145 lines
4.4 KiB
Python
# SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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#
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# SPDX-License-Identifier: GPL-2.0-or-later
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import struct
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from typing import Dict
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from .esp32c6 import ESP32C6ROM
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class ESP32C61ROM(ESP32C6ROM):
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CHIP_NAME = "ESP32-C61"
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IMAGE_CHIP_ID = 20
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# Magic value for ESP32C61
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CHIP_DETECT_MAGIC_VALUE = [0x33F0206F, 0x2421606F]
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UART_DATE_REG_ADDR = 0x60000000 + 0x7C
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EFUSE_BASE = 0x600B4800
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EFUSE_BLOCK1_ADDR = EFUSE_BASE + 0x044
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MAC_EFUSE_REG = EFUSE_BASE + 0x044
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EFUSE_RD_REG_BASE = EFUSE_BASE + 0x030 # BLOCK0 read base address
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EFUSE_PURPOSE_KEY0_REG = EFUSE_BASE + 0x34
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EFUSE_PURPOSE_KEY0_SHIFT = 0
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EFUSE_PURPOSE_KEY1_REG = EFUSE_BASE + 0x34
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EFUSE_PURPOSE_KEY1_SHIFT = 4
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EFUSE_PURPOSE_KEY2_REG = EFUSE_BASE + 0x34
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EFUSE_PURPOSE_KEY2_SHIFT = 8
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EFUSE_PURPOSE_KEY3_REG = EFUSE_BASE + 0x34
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EFUSE_PURPOSE_KEY3_SHIFT = 12
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EFUSE_PURPOSE_KEY4_REG = EFUSE_BASE + 0x34
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EFUSE_PURPOSE_KEY4_SHIFT = 16
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EFUSE_PURPOSE_KEY5_REG = EFUSE_BASE + 0x34
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EFUSE_PURPOSE_KEY5_SHIFT = 20
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EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG = EFUSE_RD_REG_BASE
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EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT = 1 << 20
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EFUSE_SPI_BOOT_CRYPT_CNT_REG = EFUSE_BASE + 0x030
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EFUSE_SPI_BOOT_CRYPT_CNT_MASK = 0x7 << 23
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EFUSE_SECURE_BOOT_EN_REG = EFUSE_BASE + 0x034
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EFUSE_SECURE_BOOT_EN_MASK = 1 << 26
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FLASH_FREQUENCY = {
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"80m": 0xF,
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"40m": 0x0,
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"20m": 0x2,
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}
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MEMORY_MAP = [
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[0x00000000, 0x00010000, "PADDING"],
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[0x41800000, 0x42000000, "DROM"],
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[0x40800000, 0x40860000, "DRAM"],
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[0x40800000, 0x40860000, "BYTE_ACCESSIBLE"],
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[0x4004AC00, 0x40050000, "DROM_MASK"],
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[0x40000000, 0x4004AC00, "IROM_MASK"],
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[0x41000000, 0x41800000, "IROM"],
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[0x40800000, 0x40860000, "IRAM"],
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[0x50000000, 0x50004000, "RTC_IRAM"],
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[0x50000000, 0x50004000, "RTC_DRAM"],
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[0x600FE000, 0x60100000, "MEM_INTERNAL2"],
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]
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UF2_FAMILY_ID = 0x77D850C4
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EFUSE_MAX_KEY = 5
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KEY_PURPOSES: Dict[int, str] = {
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0: "USER/EMPTY",
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1: "ECDSA_KEY",
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2: "XTS_AES_256_KEY_1",
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3: "XTS_AES_256_KEY_2",
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4: "XTS_AES_128_KEY",
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5: "HMAC_DOWN_ALL",
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6: "HMAC_DOWN_JTAG",
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7: "HMAC_DOWN_DIGITAL_SIGNATURE",
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8: "HMAC_UP",
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9: "SECURE_BOOT_DIGEST0",
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10: "SECURE_BOOT_DIGEST1",
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11: "SECURE_BOOT_DIGEST2",
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12: "KM_INIT_KEY",
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13: "XTS_AES_256_KEY_1_PSRAM",
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14: "XTS_AES_256_KEY_2_PSRAM",
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15: "XTS_AES_128_KEY_PSRAM",
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}
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def get_pkg_version(self):
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num_word = 2
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return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 26) & 0x07
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def get_minor_chip_version(self):
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num_word = 2
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return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F
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def get_major_chip_version(self):
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num_word = 2
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return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 4) & 0x03
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def get_chip_description(self):
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chip_name = {
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0: "ESP32-C61",
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}.get(self.get_pkg_version(), "unknown ESP32-C61")
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major_rev = self.get_major_chip_version()
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minor_rev = self.get_minor_chip_version()
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return f"{chip_name} (revision v{major_rev}.{minor_rev})"
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def get_chip_features(self):
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return ["WiFi 6", "BT 5"]
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def read_mac(self, mac_type="BASE_MAC"):
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"""Read MAC from EFUSE region"""
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mac0 = self.read_reg(self.MAC_EFUSE_REG)
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mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC
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base_mac = struct.pack(">II", mac1, mac0)[2:]
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# BASE MAC: 60:55:f9:f7:2c:a2
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macs = {
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"BASE_MAC": tuple(base_mac),
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}
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return macs.get(mac_type, None)
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class ESP32C61StubLoader(ESP32C61ROM):
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"""Access class for ESP32C61 stub loader, runs on top of ROM.
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(Basically the same as ESP32StubLoader, but different base class.
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Can possibly be made into a mixin.)
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"""
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FLASH_WRITE_SIZE = 0x4000 # matches MAX_WRITE_BLOCK in stub_loader.c
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STATUS_BYTES_LENGTH = 2 # same as ESP8266, different to ESP32 ROM
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IS_STUB = True
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def __init__(self, rom_loader):
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self.secure_download_mode = rom_loader.secure_download_mode
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self._port = rom_loader._port
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self._trace_enabled = rom_loader._trace_enabled
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self.cache = rom_loader.cache
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self.flush_input() # resets _slip_reader
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ESP32C61ROM.STUB_CLASS = ESP32C61StubLoader
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