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151
arduino-cli/libraries/U8glib/utility/u8g_dev_st7920_192x32.c
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151
arduino-cli/libraries/U8glib/utility/u8g_dev_st7920_192x32.c
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/*
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u8g_dev_st7920_192x32.c
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Universal 8bit Graphics Library
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Copyright (c) 2011, olikraus@gmail.com
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this list
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of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
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list of conditions and the following disclaimer in the documentation and/or other
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materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "u8g.h"
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#define WIDTH 192
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#define HEIGHT 32
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/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
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static const uint8_t u8g_dev_st7920_192x32_init_seq[] PROGMEM = {
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U8G_ESC_CS(0), /* disable chip */
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U8G_ESC_ADR(0), /* instruction mode */
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U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
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U8G_ESC_DLY(100), /* 8 Dez 2012: additional delay 100 ms because of reset*/
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U8G_ESC_CS(1), /* enable chip */
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U8G_ESC_DLY(50), /* delay 50 ms */
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0x038, /* 8 Bit interface (DL=1), basic instruction set (RE=0) */
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0x00c, /* display on, cursor & blink off; 0x08: all off */
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0x006, /* Entry mode: Cursor move to right ,DDRAM address counter (AC) plus 1, no shift */
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0x002, /* disable scroll, enable CGRAM adress */
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0x001, /* clear RAM, needs 1.6 ms */
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U8G_ESC_DLY(100), /* delay 10 ms */
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U8G_ESC_CS(0), /* disable chip */
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U8G_ESC_END /* end of sequence */
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};
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uint8_t u8g_dev_st7920_192x32_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
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{
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switch(msg)
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{
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case U8G_DEV_MSG_INIT:
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u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_192x32_init_seq);
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break;
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case U8G_DEV_MSG_STOP:
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break;
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case U8G_DEV_MSG_PAGE_NEXT:
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{
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uint8_t y, i;
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uint8_t *ptr;
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u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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u8g_SetAddress(u8g, dev, 0); /* cmd mode */
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u8g_SetChipSelect(u8g, dev, 1);
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y = pb->p.page_y0;
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ptr = pb->buf;
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for( i = 0; i < 8; i ++ )
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{
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u8g_SetAddress(u8g, dev, 0); /* cmd mode */
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u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */
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u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */
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u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/
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u8g_SetAddress(u8g, dev, 1); /* data mode */
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u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
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ptr += WIDTH/8;
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y++;
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}
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u8g_SetChipSelect(u8g, dev, 0);
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}
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break;
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}
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return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
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}
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uint8_t u8g_dev_st7920_192x32_4x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
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{
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switch(msg)
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{
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case U8G_DEV_MSG_INIT:
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u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_192x32_init_seq);
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break;
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case U8G_DEV_MSG_STOP:
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break;
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case U8G_DEV_MSG_PAGE_NEXT:
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{
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uint8_t y, i;
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uint8_t *ptr;
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u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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u8g_SetAddress(u8g, dev, 0); /* cmd mode */
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u8g_SetChipSelect(u8g, dev, 1);
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y = pb->p.page_y0;
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ptr = pb->buf;
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for( i = 0; i < 32; i ++ )
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{
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u8g_SetAddress(u8g, dev, 0); /* cmd mode */
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u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */
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u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */
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u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/
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u8g_SetAddress(u8g, dev, 1); /* data mode */
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u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
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ptr += WIDTH/8;
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y++;
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}
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u8g_SetChipSelect(u8g, dev, 0);
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}
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break;
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}
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return u8g_dev_pb32h1_base_fn(u8g, dev, msg, arg);
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}
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U8G_PB_DEV(u8g_dev_st7920_192x32_sw_spi, WIDTH, HEIGHT, 8, u8g_dev_st7920_192x32_fn, U8G_COM_ST7920_SW_SPI);
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U8G_PB_DEV(u8g_dev_st7920_192x32_hw_spi, WIDTH, HEIGHT, 8, u8g_dev_st7920_192x32_fn, U8G_COM_ST7920_HW_SPI);
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U8G_PB_DEV(u8g_dev_st7920_192x32_8bit, WIDTH, HEIGHT, 8, u8g_dev_st7920_192x32_fn, U8G_COM_FAST_PARALLEL);
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#define QWIDTH (WIDTH*4)
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uint8_t u8g_dev_st7920_192x32_4x_buf[QWIDTH] U8G_NOCOMMON ;
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u8g_pb_t u8g_dev_st7920_192x32_4x_pb = { {32, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_st7920_192x32_4x_buf};
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u8g_dev_t u8g_dev_st7920_192x32_4x_sw_spi = { u8g_dev_st7920_192x32_4x_fn, &u8g_dev_st7920_192x32_4x_pb, U8G_COM_ST7920_SW_SPI };
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u8g_dev_t u8g_dev_st7920_192x32_4x_hw_spi = { u8g_dev_st7920_192x32_4x_fn, &u8g_dev_st7920_192x32_4x_pb, U8G_COM_ST7920_HW_SPI };
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u8g_dev_t u8g_dev_st7920_192x32_4x_8bit = { u8g_dev_st7920_192x32_4x_fn, &u8g_dev_st7920_192x32_4x_pb, U8G_COM_FAST_PARALLEL };
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