初始化提交
This commit is contained in:
王立帮
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/*
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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version 2 as published by the Free Software Foundation.
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rf24ping85.ino by tong67 ( https://github.com/tong67 )
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This is an example of how to use the RF24 class to communicate with ATtiny85 and other node.
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Write this sketch to an ATtiny85. It will act like the 'transmit' mode of GettingStarted.ino
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Write GettingStarted.ino sketch to UNO (or other board or RPi) and put the node in 'receiver' mode.
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The ATtiny85 will transmit a counting number every second starting from 1.
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The ATtiny85 uses the tiny-core by CodingBadly (https://code.google.com/p/arduino-tiny/)
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When direct use of 3v3 does not work (UNO boards have bad 3v3 line) use 5v with LED (1.8V ~ 2.2V drop)
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For low power consumption solutions floating pins (SCK and MOSI) should be pulled high or low with eg. 10K
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** Hardware configuration **
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ATtiny25/45/85 Pin map with CE_PIN 3 and CSN_PIN 4
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+-\/-+
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NC PB5 1|o |8 Vcc --- nRF24L01 VCC, pin2 --- LED --- 5V
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nRF24L01 CE, pin3 --- PB3 2| |7 PB2 --- nRF24L01 SCK, pin5
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nRF24L01 CSN, pin4 --- PB4 3| |6 PB1 --- nRF24L01 MOSI, pin7
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nRF24L01 GND, pin1 --- GND 4| |5 PB0 --- nRF24L01 MISO, pin6
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+----+
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ATtiny25/45/85 Pin map with CE_PIN 3 and CSN_PIN 3 => PB3 and PB4 are free to use for application
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Circuit idea from http://nerdralph.blogspot.ca/2014/01/nrf24l01-control-with-3-attiny85-pins.html
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Original RC combination was 1K/100nF. 22K/10nF combination worked better.
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For best settletime delay value in RF24::csn() the timingSearch3pin.ino scatch can be used.
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This configuration is enabled when CE_PIN and CSN_PIN are equal, e.g. both 3
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Because CE is always high the power consumption is higher than for 5 pins solution
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^^
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+-\/-+ nRF24L01 CE, pin3 ------| //
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PB5 1|o |8 Vcc --- nRF24L01 VCC, pin2 ------x----------x--|<|-- 5V
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NC PB3 2| |7 PB2 --- nRF24L01 SCK, pin5 --|<|---x-[22k]--| LED
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NC PB4 3| |6 PB1 --- nRF24L01 MOSI, pin6 1n4148 |
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nRF24L01 GND, pin1 -x- GND 4| |5 PB0 --- nRF24L01 MISO, pin7 |
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| +----+ |
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|-----------------------------------------------||----x-- nRF24L01 CSN, pin4
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10nF
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ATtiny24/44/84 Pin map with CE_PIN 8 and CSN_PIN 7
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Schematic provided and successfully tested by Carmine Pastore (https://github.com/Carminepz)
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+-\/-+
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nRF24L01 VCC, pin2 --- VCC 1|o |14 GND --- nRF24L01 GND, pin1
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PB0 2| |13 AREF
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PB1 3| |12 PA1
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PB3 4| |11 PA2 --- nRF24L01 CE, pin3
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PB2 5| |10 PA3 --- nRF24L01 CSN, pin4
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PA7 6| |9 PA4 --- nRF24L01 SCK, pin5
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nRF24L01 MOSI, pin7 --- PA6 7| |8 PA5 --- nRF24L01 MISO, pin6
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+----+
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*/
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// CE and CSN are configurable, specified values for ATtiny85 as connected above
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#define CE_PIN 3
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#define CSN_PIN 4
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//#define CSN_PIN 3 // uncomment for ATtiny85 3 pins solution
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#include "RF24.h"
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RF24 radio(CE_PIN, CSN_PIN);
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byte addresses[][6] = {
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"1Node","2Node"};
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unsigned long payload = 0;
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void setup() {
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// Setup and configure rf radio
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radio.begin(); // Start up the radio
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radio.setAutoAck(1); // Ensure autoACK is enabled
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radio.setRetries(15,15); // Max delay between retries & number of retries
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radio.openWritingPipe(addresses[1]); // Write to device address '2Node'
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radio.openReadingPipe(1,addresses[0]); // Read on pipe 1 for device address '1Node'
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radio.startListening(); // Start listening
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}
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void loop(void){
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radio.stopListening(); // First, stop listening so we can talk.
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payload++;
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radio.write( &payload, sizeof(unsigned long) );
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radio.startListening(); // Now, continue listening
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unsigned long started_waiting_at = micros(); // Set up a timeout period, get the current microseconds
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boolean timeout = false; // Set up a variable to indicate if a response was received or not
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while ( !radio.available() ){ // While nothing is received
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if (micros() - started_waiting_at > 200000 ){ // If waited longer than 200ms, indicate timeout and exit while loop
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timeout = true;
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break;
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}
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}
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if ( !timeout ){ // Describe the results
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unsigned long got_time; // Grab the response, compare, and send to debugging spew
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radio.read( &got_time, sizeof(unsigned long) );
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}
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// Try again 1s later
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delay(1000);
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}
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@@ -0,0 +1,396 @@
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/*
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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version 2 as published by the Free Software Foundation.
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timingSearch3pin.ino by tong67 ( https://github.com/tong67 )
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This sketch can be used to determine the best settleTime values to use in RF24::csn().
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The used settleTimeValues are 100/20. Depend on used RC combiniation and voltage drop by LED.
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It is setup to be completely selfcontained, copied defines and code from RF24 library.
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The ATtiny85 uses the tiny-core by CodingBadly (https://code.google.com/p/arduino-tiny/)
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(Intermediate) results are written to TX (PB3, pin 2). For schematic see rf24ping85.ino
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*/
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// nRF24L01.h copy
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/* Memory Map */
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#define CONFIG 0x00
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#define EN_AA 0x01
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#define EN_RXADDR 0x02
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#define SETUP_AW 0x03
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#define SETUP_RETR 0x04
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#define RF_CH 0x05
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#define RF_SETUP 0x06
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#define STATUS 0x07
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#define OBSERVE_TX 0x08
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#define CD 0x09
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#define RX_ADDR_P0 0x0A
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#define RX_ADDR_P1 0x0B
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#define RX_ADDR_P2 0x0C
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#define RX_ADDR_P3 0x0D
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#define RX_ADDR_P4 0x0E
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#define RX_ADDR_P5 0x0F
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#define TX_ADDR 0x10
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#define RX_PW_P0 0x11
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#define RX_PW_P1 0x12
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#define RX_PW_P2 0x13
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#define RX_PW_P3 0x14
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#define RX_PW_P4 0x15
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#define RX_PW_P5 0x16
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#define FIFO_STATUS 0x17
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#define DYNPD 0x1C
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#define FEATURE 0x1D
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/* Bit Mnemonics */
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#define MASK_RX_DR 6
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#define MASK_TX_DS 5
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#define MASK_MAX_RT 4
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#define EN_CRC 3
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#define CRCO 2
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#define PWR_UP 1
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#define PRIM_RX 0
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#define ENAA_P5 5
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#define ENAA_P4 4
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#define ENAA_P3 3
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#define ENAA_P2 2
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#define ENAA_P1 1
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#define ENAA_P0 0
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#define ERX_P5 5
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#define ERX_P4 4
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#define ERX_P3 3
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#define ERX_P2 2
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#define ERX_P1 1
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#define ERX_P0 0
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#define AW 0
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#define ARD 4
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#define ARC 0
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#define PLL_LOCK 4
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#define RF_DR 3
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#define RF_PWR 6
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#define RX_DR 6
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#define TX_DS 5
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#define MAX_RT 4
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#define RX_P_NO 1
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#define TX_FULL 0
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#define PLOS_CNT 4
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#define ARC_CNT 0
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#define TX_REUSE 6
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#define FIFO_FULL 5
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#define TX_EMPTY 4
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#define RX_FULL 1
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#define RX_EMPTY 0
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#define DPL_P5 5
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#define DPL_P4 4
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#define DPL_P3 3
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#define DPL_P2 2
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#define DPL_P1 1
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#define DPL_P0 0
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#define EN_DPL 2
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#define EN_ACK_PAY 1
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#define EN_DYN_ACK 0
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/* Instruction Mnemonics */
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#define R_REGISTER 0x00
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#define W_REGISTER 0x20
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#define REGISTER_MASK 0x1F
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#define ACTIVATE 0x50
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#define R_RX_PL_WID 0x60
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#define R_RX_PAYLOAD 0x61
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#define W_TX_PAYLOAD 0xA0
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#define W_ACK_PAYLOAD 0xA8
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#define FLUSH_TX 0xE1
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#define FLUSH_RX 0xE2
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#define REUSE_TX_PL 0xE3
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#define RF24_NOP 0xFF
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/* Non-P omissions */
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#define LNA_HCURR 0
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/* P model memory Map */
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#define RPD 0x09
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#define W_TX_PAYLOAD_NO_ACK 0xB0
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/* P model bit Mnemonics */
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#define RF_DR_LOW 5
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#define RF_DR_HIGH 3
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#define RF_PWR_LOW 1
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#define RF_PWR_HIGH 2
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/****************************************************************************/
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//ATTiny support code pulled in from https://github.com/jscrane/RF24
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#if defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__)
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// see http://gammon.com.au/spi
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# define DI 0 // D0, pin 5 Data In
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# define DO 1 // D1, pin 6 Data Out (this is *not* MOSI)
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# define USCK 2 // D2, pin 7 Universal Serial Interface clock
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# define SS 3 // D3, pin 2 Slave Select
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#elif defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__)
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// these depend on the core used (check pins_arduino.h)
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// this is for jeelabs' one (based on google-code core)
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# define DI 4 // PA6
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# define DO 5 // PA5
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# define USCK 6 // PA4
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# define SS 3 // PA7
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#endif
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#if defined (ARDUINO) && !defined (__arm__)
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#if defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__) || defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__)
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#define RF24_TINY
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#else
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// #include <SPI.h>
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#endif
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#endif
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#if defined(RF24_TINY)
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#include <stdio.h>
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#include <Arduino.h>
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#include <avr/pgmspace.h>
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#define SPI_CLOCK_DIV4 0x00
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#define SPI_CLOCK_DIV16 0x01
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#define SPI_CLOCK_DIV64 0x02
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#define SPI_CLOCK_DIV128 0x03
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#define SPI_CLOCK_DIV2 0x04
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#define SPI_CLOCK_DIV8 0x05
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#define SPI_CLOCK_DIV32 0x06
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//#define SPI_CLOCK_DIV64 0x07
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#define SPI_MODE0 0x00
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#define SPI_MODE1 0x04
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#define SPI_MODE2 0x08
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#define SPI_MODE3 0x0C
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#define SPI_MODE_MASK 0x0C // CPOL = bit 3, CPHA = bit 2 on SPCR
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#define SPI_CLOCK_MASK 0x03 // SPR1 = bit 1, SPR0 = bit 0 on SPCR
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#define SPI_2XCLOCK_MASK 0x01 // SPI2X = bit 0 on SPSR
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class SPIClass {
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public:
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static byte transfer(byte _data);
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// SPI Configuration methods
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inline static void attachInterrupt();
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inline static void detachInterrupt(); // Default
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static void begin(); // Default
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static void end();
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// static void setBitOrder(uint8_t);
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// static void setDataMode(uint8_t);
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// static void setClockDivider(uint8_t);
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};
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extern SPIClass SPI;
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#endif /* RF24_TINY */
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#if defined(RF24_TINY)
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void SPIClass::begin() {
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digitalWrite(SS, HIGH);
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pinMode(USCK, OUTPUT);
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pinMode(DO, OUTPUT);
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pinMode(SS, OUTPUT);
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pinMode(DI, INPUT);
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USICR = _BV(USIWM0);
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}
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byte SPIClass::transfer(byte b) {
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USIDR = b;
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USISR = _BV(USIOIF);
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do
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USICR = _BV(USIWM0) | _BV(USICS1) | _BV(USICLK) | _BV(USITC);
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while ((USISR & _BV(USIOIF)) == 0);
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return USIDR;
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}
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void SPIClass::end() {}
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#endif /* RF24_TINY */
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/****************************************************************************/
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uint8_t ce_pin; /**< "Chip Enable" pin, activates the RX or TX role */
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uint8_t csn_pin; /**< SPI Chip select */
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uint8_t csnHighSettle = 255;
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uint8_t csnLowSettle = 255;
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/****************************************************************************/
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void ce(bool level) {
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if (ce_pin != csn_pin) digitalWrite(ce_pin,level);
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}
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/****************************************************************************/
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void setCsnHighSettle(uint8_t level) {
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csnHighSettle = level;
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}
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/****************************************************************************/
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void setCsnLowSettle(uint8_t level) {
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csnLowSettle = level;
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}
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/****************************************************************************/
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void csn(bool mode) {
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if (ce_pin != csn_pin) {
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digitalWrite(csn_pin,mode);
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} else {
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if (mode == HIGH) {
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PORTB |= (1<<PINB2); // SCK->CSN HIGH
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delayMicroseconds(csnHighSettle); // allow csn to settle
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} else {
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PORTB &= ~(1<<PINB2); // SCK->CSN LOW
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delayMicroseconds(csnLowSettle); // allow csn to settle
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}
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}
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}
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/****************************************************************************/
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uint8_t read_register(uint8_t reg)
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{
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csn(LOW);
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SPI.transfer( R_REGISTER | ( REGISTER_MASK & reg ) );
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uint8_t result = SPI.transfer(0xff);
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csn(HIGH);
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return result;
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}
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/****************************************************************************/
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uint8_t write_register2(uint8_t reg, uint8_t value)
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{
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uint8_t status;
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csn(LOW);
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status = SPI.transfer( W_REGISTER | ( REGISTER_MASK & reg ) );
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SPI.transfer(value);
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csn(HIGH);
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return status;
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}
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/****************************************************************************/
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#if defined(RF24_TINY)
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#define CE_PIN 3
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#define CSN_PIN 3
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#else
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#define CE_PIN 7
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#define CSN_PIN 8
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#endif
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#define MAX_HIGH 100
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#define MAX_LOW 100
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#define MINIMAL 8
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void setup(void) {
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uint8_t status;
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// start serial port and SPI
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Serial.begin(9600);
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SPI.begin();
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// configure ce and scn as output when used
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ce_pin = CE_PIN;
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csn_pin = CSN_PIN;
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setCsnHighSettle(MAX_HIGH);
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setCsnLowSettle(MAX_LOW);
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// csn is used in SPI transfers. Set to LOW at start and HIGH after transfer. Set to HIGH to reflect no transfer active
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// SPI command are accepted in Power Down state.
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// ce represent PRX (LOW) or PTX (HIGH) mode apart from register settings. Start in PRX mode.
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ce(LOW);
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csn(HIGH);
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// nRF24L01 goes from to Power Down state 100ms after Power on Reset ( Vdd > 1.9V) or when PWR_UP is 0 in config register
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// Goto Power Down state (Powerup or force) and set in transmit mode
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write_register2(CONFIG, read_register(CONFIG) & ~_BV(PWR_UP) & ~_BV(PRIM_RX));
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delay(100);
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// Goto Standby-I
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// Technically we require 4.5ms Tpd2stby+ 14us as a worst case. We'll just call it 5ms for good measure.
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// WARNING: Delay is based on P-variant whereby non-P *may* require different timing.
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write_register2(CONFIG, read_register(CONFIG) | _BV(PWR_UP));
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delay(5) ;
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// Goto Standby-II
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ce(HIGH);
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Serial.print("Scanning for optimal setting time for scn");
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}
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void loop(void) {
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uint8_t status;
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uint8_t i;
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uint8_t j;
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uint8_t k;
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bool success = true;
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uint8_t csnHigh = MAX_HIGH;
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uint8_t csnLow = MAX_LOW;
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uint8_t bottom_success;
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bool bottom_found;
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uint8_t value[] = {5,10};
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uint8_t limit[] = {MAX_HIGH,MAX_LOW};
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uint8_t advice[] = {MAX_HIGH,MAX_LOW};
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// check max values give correct behavior
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for (k=0;k<2;k++) {
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bottom_found = false;
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bottom_success = 0;
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while(bottom_success < 255) {
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setCsnHighSettle(limit[0]);
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setCsnLowSettle(limit[1]);
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// check current values
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i = 0;
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while(i<255 & success) {
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for (j=0;j<2;j++) {
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write_register2(EN_AA, value[j]);
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status = read_register(EN_AA);
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if (value[j] != status) {
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success = false;
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}
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}
|
||||
i++;
|
||||
}
|
||||
// process result of current values
|
||||
if (!success) {
|
||||
Serial.print("Settle NOK. csnHigh=");
|
||||
Serial.print(limit[0],DEC);
|
||||
Serial.print(" csnLow=");
|
||||
Serial.println(limit[1],DEC);
|
||||
limit[k]++;
|
||||
bottom_found = true;
|
||||
bottom_success = 0;
|
||||
success = true;
|
||||
} else {
|
||||
Serial.print("Settle OK. csnHigh=");
|
||||
Serial.print(limit[0],DEC);
|
||||
Serial.print(" csnLow=");
|
||||
Serial.println(limit[1],DEC);
|
||||
if (!bottom_found) {
|
||||
limit[k]--;
|
||||
if (limit[k] == MINIMAL) {
|
||||
bottom_found = true;
|
||||
bottom_success = 0;
|
||||
success = true;
|
||||
}
|
||||
} else {
|
||||
bottom_success++;
|
||||
}
|
||||
}
|
||||
}
|
||||
Serial.print("Settle value found for ");
|
||||
if (k == 0) {
|
||||
Serial.print("csnHigh: ");
|
||||
} else {
|
||||
Serial.print("csnLow: ");
|
||||
}
|
||||
Serial.println(limit[k],DEC);
|
||||
advice[k] = limit[k] + (limit[k] / 10);
|
||||
limit[k] = 100;
|
||||
}
|
||||
Serial.print("Adviced Settle times are: csnHigh=");
|
||||
Serial.print(advice[0],DEC);
|
||||
Serial.print(" csnLow=");
|
||||
Serial.println(advice[1],DEC);
|
||||
while (true)
|
||||
{
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user